Re: PD tools for FPGA's/PLD's (Was: ASIC price/volume/performance)

staym@accessdata.com
Fri, 19 Jun 1998 17:50:36 -0600

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One thing that has been missing from this discussion of prices are
engineering costs, chip glue, power cords, interfacing, etc., which
actually adds a great deal to the overall cost.

AccessData is building a massively parallel computer to break Word &
Excel documents (and DES for kicks) out of FPGA's and DSP's; the
estimates on the 40-bit RC4/MD5 authentication MS uses are
~20,000 keys/sec/chip, with 64 chips per box, or ~1.3 million
keys/box/sec. The boxes will cost $6-8K, depending on the chip and
quantities.

For DES, we'll only be at ~1.2 billion keys/box/sec; we're hoping that
once we have this proof-of-concept (i.e. the parallel processing boxes)
and all that overhead taken care of, someone will foot the bill for
developing the ASIC chip (1000% faster, at least) and we can
plug-'n-play :-)

-- 
Mike Stay
Cryptographer / Programmer
AccessData Corp.
mailto:staym@accessdata.com

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