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The following archive was created by hippie-mail 7.98617-22 on Sat Apr 10 1999 - 01:17:37
Sandy Harris (sandy.harris@sympatico.ca)
Fri, 11 Dec 1998 09:27:58 -0500
Andy Brown wrote:
>
> You wrote:
>
> > I assume that a hand optimized ASM implementation for AMD K6 will
> > run faster than a similar P-II implementation. The reason? Simply
> > because the K6 is more efficient in Operations/Clock ... specially
> > working with integers where the lack of the L2 is not relevant.
>
> Only if you can keep everything in registers. The 512K clk/2 L2 cache
> on a PII will easily trounce a K6 if you have to go out to memory a
> lot. The PPro is even better at this, and the K6-3 will beat them all
> early next year.
For most applications, you'd be right. But for most crypto algorithms,
code & tables would fit in level 1 cache & the data has to be read from
memory once & written back once no matter what cache you have, so the
level 2 cache is less of an issue.
--
Sandy Harris sandy.harris@sympatico.ca
Fight cryptography controls
"The real aim of current policy is to ensure the continued effectiveness of US
information warfare assets against individuals, businesses and governments in
Europe and elsewhere" -- Ross Anderson, Cambridge University
The following archive was created by hippie-mail 7.98617-22 on Sat Apr 10 1999 - 01:17:37